同樣WikiPedia文章並說,大約與TSC如下問題,
With the advent of multi-core/hyper-threaded CPUs, systems with multiple CPUs, and
hibernating operating systems, the TSC cannot be relied on to provide accurate results
— unless great care is taken to correct the possible flaws: rate of tick and whether
all cores (processors) have identical values in their time-keeping registers. **There
is no promise that the timestamp counters of multiple CPUs on a single motherboard will
be synchronized**. In such cases, programmers can only get reliable results by locking
their code to a single CPU. Even then, the CPU speed may change due to power-saving
measures taken by the OS or BIOS, or the system may be hibernated and later resumed
(resetting the time stamp counter). In those latter cases, to stay relevant, the
counter must be recalibrated periodically (according to the time resolution your
application requires).
含義現代的CPU可以改變他們的CPU時鐘頻率,以節省功耗可影響TSC的值。在內核可以執行HALT並停止處理器直到收到外部中斷的情況下,TSC也不會增加。
the second question is that i have intel xeon i3 processor which has 4 processors &
each having 2 cores then measuring the clock ticks will give the ticks of single
processor or addition of all 4 processors..?
這可能導致一種情況的處理可以在一個處理器讀出的時間,將移動到一個第二處理器和遇到的時間早於它,這導致TSC爲不穩定時所述第一處理器上讀取的一個資源。
時鐘滴答與運行'rdtscl'的核心相關 –