我想了解我的GPU的內存組織是如何工作的。根據下面列表的技術規範,我的GPU可以有8個活動塊/ SM和768個線程/ SM。基於此,我認爲爲了利用上面的每個塊應該有96(= 768/8)個線程。具有這個線程數的最接近的塊我認爲它是一個9x9塊,81個線程。使用8個塊可以在一個SM中同時運行的事實,我們將擁有648個線程。其餘的120(= 768-648)呢?發現我的GPU功能
我知道這些想法發生了錯誤。一個簡單的例子描述了SM線程的最大數量與每個塊的最大線程數量以及基於GPU規格的warp大小之間的聯繫,這將非常有幫助。
Device 0: "GeForce 9600 GT"
CUDA Driver Version/Runtime Version 5.5/5.0
CUDA Capability Major/Minor version number: 1.1
Total amount of global memory: 512 MBytes (536870912 bytes)
(8) Multiprocessors x ( 8) CUDA Cores/MP: 64 CUDA Cores
GPU Clock rate: 1680 MHz (1.68 GHz)
Memory Clock rate: 700 Mhz
Memory Bus Width: 256-bit
Max Texture Dimension Size (x,y,z) 1D=(8192), 2D=(65536,32768), 3D=(2048,2048,2048)
Max Layered Texture Size (dim) x layers 1D=(8192) x 512, 2D=(8192,8192) x 512
Total amount of constant memory: 65536 bytes
Total amount of shared memory per block: 16384 bytes
Total number of registers available per block: 8192
Warp size: 32
Maximum number of threads per multiprocessor: 768
Maximum number of threads per block: 512
Maximum sizes of each dimension of a block: 512 x 512 x 64
Maximum sizes of each dimension of a grid: 65535 x 65535 x 1
Maximum memory pitch: 2147483647 bytes
Texture alignment: 256 bytes
Concurrent copy and kernel execution: Yes with 1 copy engine(s)
Run time limit on kernels: Yes
Integrated GPU sharing Host Memory: No
Support host page-locked memory mapping: Yes
Alignment requirement for Surfaces: Yes
Device has ECC support: Disabled
Concurrent kernel execution: No
Device supports Unified Addressing (UVA): No
Device PCI Bus ID/PCI location ID: 1/0
你看過這篇文章嗎? http://stackoverflow.com/questions/17816136/cuda-what-is-the-threads-per-multiprocessor-and-threads-per-block-distinction?rq=1 – PhillipD
從我讀過的東西這篇文章我明白,每個SM可以處理不同數量的塊,小於/等於可以在一個SM上運行的最大塊數。這是否意味着8個塊都可以有512個線程?即使這個線程數可能超過GPU上可以同時運行的最大線程數,warp調度程序是否會組織這些線程的執行(512x8)? – Darkmoor