VHDL錯誤：在合格表達式中指定的類型必須匹配上下文表達式所暗示的類型

Question

我試圖使用自己創建的函數（這是我第一次嘗試它，所以我可能在那裏做錯了）。

當我嘗試編譯時，出現以下錯誤消息：錯誤（13815）：Averageador.vhd（38）處的VHDL限定表達式錯誤：合格表達式中指定的除法類型必須匹配上下文表達式暗示的無符號類型

劃分是我函數的名稱。該函數將任何16位無符號值除以未知的無符號值，並將結果作爲固定點32位無符號值，其中16位位於該點的每一側。這是代碼：

library IEEE; 
use IEEE.std_logic_1164.all; 
use IEEE.std_logic_arith.all; 

package propios is 

--function declaration. 
function divide (a : UNSIGNED; b: UNSIGNED) return UNSIGNED; 
end propios; --end of package. 

package body propios is --start of package body 
--definition of function 
function divide (a : UNSIGNED; b: UNSIGNED) return UNSIGNED is 
variable a_int : unsigned(a'length+7 downto 0):= (others => '0'); 
variable b_int : unsigned(b'length-1 downto 0):=b; 
variable r : unsigned(b'length downto 0):= (others => '0'); 
variable q : unsigned(31 downto 0):= (others => '0'); 
begin 
a_int(a'length+7 downto 16):=a; 
for i in a'length+7 downto 0 loop 
    r(b'length downto 1):=r(b'length-1 downto 0); 
    r(0) := a_int(i); 
    if (r>=q) then 
     r:=r-b_int; 
     q(i):='1'; 
    end if; 
end loop; 
return q; 
end divide; 
--end function 
end propios; --end of the package body 

我返回q這是一個32位無符號。

這是我使用的功能，並提示錯誤信息代碼：

library ieee; 
use ieee.std_logic_1164.all; 
use ieee.numeric_std.all; 

library work; 
use work.propios.all; 

ENTITY test IS --Con alimentación de datos posición a posición, no vector de golpe. 

END test; 
Architecture simple of test is 
signal a:unsigned(15 downto 0); 
signal b:unsigned(13 downto 0); 
signal c: unsigned(31 downto 0); 
begin 


process 
begin 
a<="1100100110100111"; 
b<="00000000000010"; 
c<= divide(a,b); 


end process; 


end simple; 

有什麼建議？謝謝

Answer 1

這個問題是由於使用軟件包中的std_logic_arith和測試中的numeric_std導致的（正如user1155120所述）。因此，即使兩者都被稱爲unsigned，它們也不相互兼容。

兩個代碼都包含其他錯誤，這些錯誤也已被糾正，但與第一個錯誤無關。

這是封裝的一個功能，用於將2張無符號數與16位的昏迷後：

library IEEE; 
use IEEE.std_logic_1164.all; 
use IEEE.numeric_std.all; 

package propios is 

--function declaration. 
function divide (a : UNSIGNED; b: UNSIGNED) return UNSIGNED; 
end propios; --end of package. 

package body propios is --start of package body 
--definition of function 
function divide (a : UNSIGNED; b: UNSIGNED) return UNSIGNED is 
variable a_int : unsigned(a'length+15 downto 0):= (others => '0');--Length is 16 bit longer than a 
variable b_int : unsigned(b'length-1 downto 0):=b; 
variable r : unsigned(b'length downto 0):= (others => '0'); 
variable q : unsigned(a'length+15 downto 0):= (others => '0');--Same length as a_int 
variable i: natural; 

begin 
a_int(a'length+15 downto 16):=a;--the MSBits are "a" and the rest will be 0's 
for i in a'length+15 downto 0 loop--division using a modified version of integer division (unsigned) with remainder as seen in: 
--https://en.wikipedia.org/wiki/Division_algorithm 
    r(b'length downto 1):=r(b'length-1 downto 0); 
    r(0) := a_int(i); 
    if (r>=b_int) then 
     r:=r-b_int; 
     q(i):='1'; 
    end if; 
end loop; 
return q; 
end divide; 
--end function 
end propios; --end of the package body 

這是一個簡單的測試，以檢查它的功能：

library ieee; 
use ieee.std_logic_1164.all; 
use ieee.numeric_std.all; 

library work; 
use work.propios.all; 

ENTITY test IS --Con alimentación de datos posición a posición, no vector de golpe. 

END test; 
Architecture simple of test is 
signal a:unsigned(23 downto 0); 
signal b:unsigned(13 downto 0); 
signal c: unsigned(39 downto 0); 
begin 


process 
begin 
a<="000000001100100110100111"; 
b<="00000000010010"; 
wait for 200ps; 
c<= divide (a , b); 

wait; 
end process; 


end simple; 

要檢查結果請記住結果的最後16位位於固定點之後。