我使用UVM命令行參數在UVM層次結構中設置配置屬性。UVM是否可以標記錯誤的命令行參數？
當我通過一個錯誤的配置選項，我想看到一個UVM_ERROR或另一個失敗指示。什麼是最簡單的方法來完成這一點？
例如，如果我通過在像一個壞的選擇：
+uvm_set_config_int=bad,mode,5
辛完成了，我沒有看到日誌，該選項是壞的跡象，包括：
# UVM_INFO @ 0: reporter [UVM_CMDLINE_PROC] Applying config setting from the command line: +uvm_set_config_int=bad,mode,5
完整的代碼可以在這裏運行：http://www.edaplayground.com/s/4/673
我創建了一個uvm_component可以標誌一個壞+uvm_set_config_選項。它拋出一個UVM_ERROR如果一個壞的選擇是通過了，如：
# UVM_ERROR cmd_line_checker.svh(112) @ 0: uvm_test_top.cmd_line_checker [BAD_CONFIG] UVM match for command line config bad,mode not found
完整例子可以在這裏運行：http://www.edaplayground.com/s/4/766
代碼：
/**
* This is a utility class to validate command line arguments in the form:
* +uvm_set_config_int=<inst_name>,<field_name>,<value>
* +uvm_set_config_string=<inst_name>,<field_name>,<value>
*/
class cmd_line_checker extends uvm_component;
/**
* The enable for this checker.
*/
bit enable = 1'b1;
`uvm_component_utils_begin(cmd_line_checker)
`uvm_field_int(enable, UVM_ALL_ON)
`uvm_component_utils_end
/**
* UVM constructor.
*/
function new(string name, uvm_component parent);
super.new(name, parent);
endfunction
/**
* UVM connect phase.
*/
function void connect_phase(uvm_phase phase);
if (enable) begin
check_command_line();
end
endfunction
/**
* Validate all command line arguments in the form:
* +uvm_set_config_int=<inst_name>,<field_name>,<value>
* +uvm_set_config_string=<inst_name>,<field_name>,<value>
*/
function void check_command_line();
string args[$];
uvm_root root = uvm_root::get();
void'(root.clp.get_arg_matches(
"/^\\+(UVM_SET_CONFIG_INT|uvm_set_config_int)=/",args));
foreach(args[i]) begin
check_config(args[i].substr(20, args[i].len()-1));
end
void'(root.clp.get_arg_matches(
"/^\\+(UVM_SET_CONFIG_STRING|uvm_set_config_string)=/",args));
foreach(args[i]) begin
check_config(args[i].substr(23, args[i].len()-1));
end
endfunction
/**
* Check a single command line argument.
* The instance name and field name should exist.
* @param cfg the command line argument in the form:
* <inst_name>,<field_name>,<value>
*/
function void check_config(string cfg);
string split_val[$];
string inst_name;
string field_name;
uvm_root root;
uvm_component components[$];
bit match_found;
uvm_split_string(cfg, ",", split_val);
inst_name = split_val[0];
field_name = split_val[1];
`uvm_info("CHECK_CONFIG",
$sformatf("checking inst_name:%s, field_name:%s",
inst_name, field_name), UVM_HIGH);
// Get every object in uvm hierarchy that matches
root = uvm_root::get();
root.find_all(inst_name, components);
// If object matches inst_name, check whether a match for field_name exists
foreach (components[i]) begin
if (match_found) begin
break;
end else begin
uvm_component component = components[i];
uvm_status_container status = component.__m_uvm_status_container;
component.__m_uvm_field_automation (null, UVM_CHECK_FIELDS, "");
if (uvm_has_wildcard(field_name)) begin
foreach (status.field_array[name]) begin
if (!(uvm_re_match(uvm_glob_to_re(field_name), name))) begin
match_found = 1;
break;
end
end
end else begin
// No wildcards to match
match_found = status.field_array[field_name];
end
status.field_array.delete();
if (match_found) begin
`uvm_info("MATCH_FOUND", $sformatf(
"UVM match for command line config %s,%s found in %s",
inst_name, field_name, component.get_full_name()), UVM_HIGH);
break;
end
end
end
if (!match_found) begin
`uvm_error("BAD_CONFIG",
$sformatf("UVM match for command line config %s,%s not found",
inst_name, field_name));
end
endfunction
endclass
對於上述cmd_line_checker這裏SVUnit測試：http://www.edaplayground.com/s/4/768
我不太確定你的意思是一個錯誤的配置選項。當您執行uvm_set_config_int時，您的前兩個參數僅指定實例和字段名稱。沒有要求這兩個實際存在。你基本上只是把這個配置選項放到配置數據庫中以便以後訪問。
您可能需要的是在代理中進行檢查，確保其實際傳遞了其「模式」字段的值。
class my_agent extends uvm_agent;
//...
function void build_phase(uvm_phase phase);
if (!uvm_config_db #(int)::get(this, "", "mode", mode))
`uvm_fatal("CFGERR", "Agent was not passed a config")
endfunction
endclass
我在EDAPlayground上用你的代碼測試了這個，但我不確定它是否被保存。
UVM可以使用靜態位uvm_component::print_config_matches位輸出配置設置的附加信息。
在這個例子中，設置在您的測試平臺如下：
uvm_component::print_config_matches = 1;
對於「好」的配置設置，你會看到下面的輸出：
# UVM_INFO @ 0: reporter [UVM_CMDLINE_PROC] Applying config setting from the command line: +uvm_set_config_int=*,mode,5
# UVM_INFO @ 0: uvm_test_top.my_agent [CFGAPL] applying configuration settings
# UVM_INFO @ 0: uvm_test_top.my_agent [CFGAPL] applying configuration to field mode
# UVM_INFO testbench(40) @ 0: uvm_test_top [my_test] Running test with mode 5
對於「壞「配置設置，您將在輸出中看到以下內容：
# UVM_INFO @ 0: reporter [UVM_CMDLINE_PROC] Applying config setting from the command line: +uvm_set_config_int=bad,mode,5
# UVM_INFO @ 0: uvm_test_top.my_agent [CFGAPL] applying configuration settings
# UVM_INFO testbench(40) @ 0: uvm_test_top [my_test] Running test with mode 0
因此，現在您可以解析輸出t並檢查每個[UVM_CMDLINE_PROC] Applying config settings後面至少有一個[CFGAPL] applying configuration to field。
聽起來像沒有自動全局UVM檢查，以確保實例/字段名稱實際存在，這就是我所說的，尋找。要在EDA Playground上保存自己的代碼副本，請單擊「複製」，您將獲得新的Web鏈接。然後，再次保存它點擊'更新' –