嗨,大家好,我有以下包裝,由我自己定義的包裝VHDL包含錯誤
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
package util_pkg is
function log2c(n : natural) return natural;
end package util_pkg;
package body util_pkg is
function log2c(n : natural) return natural is
variable temp : natural := n;
variable ret_val : natural := 0;
begin
while temp > 1 loop
ret_val := ret_val + 1;
temp = temp/2;
end loop;
return ret_val;
end function log2c;
end package body util_pkg;
,而我的設計是
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use ieee.std_logic_misc.all;
use work.util_pkg.all;
entity ldz is
generic(n : natural); --i can assume n > 1
port(x : in std_logic_vector(n - 1 downto 0);
y : out std_logic_vector(log2c(n) - 1 downto 0));
end entity ldz;
-- Example
architecture ldz_arch of ldz is
function ldz_count(x : unsigned) return natural is
n_ldz : natural := 0;
begin
for i in x'high to 0 loop
if(x(i) = '1') then
return x'length - i - 1;
end if;
end loop;
return x'length - 1;
end function ldz_count;
begin
y <= std_logic_vector(to_unsigned(ldz_count(to_unsigned(x)));
end architecture ldz_arch;
當我嘗試驗證語法與此NCVHDL的預是錯誤我得到
unit (UTIL_PKG) not found in library (WORKLIB)
但是這樣的單位(包)是在同一個設計庫中。 檔案是util_pkg.vhd
而設計是ldz.vhd
什麼是錯的?
確保你在'ldz.vhd'之前編譯了軟件包,並確保通過添加'-work work'將你的軟件包編譯到工作庫中。 – 0xMB
您的log2c功能不正確。例如:n = 5d = 101b。它迭代2次並將ret_val遞增爲2,但log2ceil(5)不是2,它是3. – Paebbels
如果x大於1位,則此循環'for i in x'high to 0 loop' has a empty range。 – Paebbels