我最近一直在嘗試在vhdl中製作自動售貨機的代碼。開始得到一些奇怪的錯誤,並設法縮小到我的顯示值正在更新。 該代碼基本上假設能夠在7段顯示器的顯示格式之間切換。我會說它的工作原理應該是大部分,但似乎隨機凍結 我修改了代碼,發現如下,有點用於調試,並注意到case語句中的值被卡住了一定的值。其餘的代碼可以持續運行,所以我可以重置並重新運行。下面是有問題的代碼VHDL案例語句中的值隨機陷入一定的值
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
entity display_switch is
Port ( clk : in STD_LOGIC;
reset: in STD_LOGIC;
number : in STD_LOGIC_VECTOR (13 downto 0);-- unsigned binary number
hexid : in std_logic_vector(15 downto 0); -- hex representation
sel : in std_logic;
an : out std_logic_vector(3 downto 0);
seg : out STD_LOGIC_VECTOR (6 downto 0); -- 7 segment display
dp,Led,Led1,Led2 : out std_logic);
end display_switch;
architecture bhv of display_switch is
type button_state is(dec,hex,deb); -- states for display formats
signal current_display,next_display : button_state;
process(clk, reset)
begin
if reset = '1' then -- asynchronous reset
current_display <= dec;
next_display <= hex;
decp <= '1'; -- decimal point
elsif rising_edge(clk) then
segm_display <= hexid;
case current_display is
when dec => Led2 <= '1';
Led1 <= '0';
Led <= '0';
decp <= '0';
next_display <= hex;
if sel = '1' then
current_display <= deb;
end if;
when hex => Led2 <= '0';
Led1 <= '1';
Led <= '0';
decp <= '1';
next_display <= dec;
if sel = '1' then
current_display <= deb;
end if;
when deb => Led2 <= '0';
Led1 <= '0';
Led <= '1';
if sel /= '1' then
current_display <= next_display;
end if;
when others => current_display <= dec;
end case;
end if;
end process;
end bhv;
基本上發生的事情是,在case語句的輸出值要麼全部陷在「1」或全部陷在「0」。
謝謝
我仍然需要一些if子句來知道我之前的顯示是什麼,所以我知道下一步該怎麼做。 – hops1