我必須設計一個使用FPGA和Verilog的紅外發射器。verilog紅外輸出
其中一個條件是每10Hz發送一個數據包,我有一個計數器在主時鐘(100MHz)的10Hz處創建一個輔助時鐘。 該數據包包含開始間隙選擇間隙右側間隙左側間隙前向間隙後向間隙。我有一個FSM在10Hz輔助時鐘的正向邊緣進行這種轉換。 數據包中的每個塊都有其大小,Gap只是將它們分開的空白空間。方向塊選擇時尺寸較大,否則較小。 在接收器的脈衝頻率爲36kHz的條件下,我有另一個計數器,它將主時鐘減少到36kHz,我用這個計數器爲Start,Select等產生脈衝大小,並在計數器遞增時使輸出爲1到那個大小(對於開始的情況,請選擇..)和0爲間隙狀態。
但是,當我通過智能手機攝像頭查看LED時,顯示它始終處於正常狀態,這是我期望看到的,因爲它應該每秒發送數據包10次。
問題是,汽車根本不動,我的問題是這是做事情的正確邏輯還是我錯過了什麼? 感謝
請求代碼:
爲36kHz脈衝
[email protected](posedge CLK) begin
if(RESET) begin
Counter <= 0;
SEC_CLK <= 0;
end
else if(Counter == 2778) begin
Counter <= 0;
SEC_CLK <= 1'b1;
end
else begin
Counter <= Counter + 1;
SEC_CLK <= 1'b0;
end
end
的10Hz的計數器,計數器,不知道是好是減少36kHz或使用主時鐘,但它是一個不錯的輪數,所以我使用的主時鐘
[email protected](posedge CLK) begin
if(sec_counter == 100000) begin
sec_counter <= 0;
send <= 1;
end
else begin
sec_counter <= sec_counter +1;
send <= 0;
end
end`
的FSM邏輯:
[email protected](Curr_State) begin
case(Curr_State)
1'd0: begin //START
Next_State <= 1'd1;
Previous_State <= Next_State;
max_count <= StartBurstSize;
flag <= 0;
end
1'd1: begin //GAP
if(Previous_State <= 1'd7)
Next_State<=1'd0;
else
Next_State <= Previous_State +1;
max_count <= GapSize;
flag <= 1;
IR_LED = 1'b1;
if(change)
Curr_State <= Next_State;
else
Next_State <= Curr_State;
end
1'd2: begin //SELECT
Next_State <= 1'd1;
Previous_State <= Curr_State;
max_count <= CarSelectBurstSize;
IR_LED = 1'b0;
flag <= 0;
if(change)
Curr_State <= Next_State;
else
Next_State <= Curr_State;
end
1'd3: begin //RIGHT
if(BTNR)
max_count <= AsserBurstSize;
else
max_count <= DeAssertBurstSize;
Next_State <= 1'd1;
Previous_State <= Curr_State;
flag <= 0;
if(change)
Curr_State <= Next_State;
else
Next_State <= Curr_State;
IR_LED = 1'b1;
end
1'd4: begin //LEFT
if(BTNL)
max_count <= AsserBurstSize;
else
max_count <= DeAssertBurstSize;
Next_State <= 1'd1;
Previous_State <= Curr_State;
flag <= 0;
if(change)
Curr_State <= Next_State;
else
Next_State <= Curr_State;
IR_LED = 1'b1;
end
1'd5: begin //FORWARD
if(BTNU)
max_count <= AsserBurstSize;
else
max_count <= DeAssertBurstSize;
Next_State <= 1'd1;
Previous_State <= Curr_State;
flag <= 0;
if(change)
Curr_State <= Next_State;
else
Next_State <= Curr_State;
IR_LED = 1'b1;
end
1'd6: begin //Backwards
if(BTND)
max_count <= AsserBurstSize;
else
max_count <= DeAssertBurstSize;
Next_State <= 1'd1;
Previous_State <= Curr_State;
flag <= 0;
if(change)
Curr_State <= Next_State;
else
Next_State <= Curr_State;
IR_LED = 1'b1;
end
endcase
end
發送到紅外脈衝LED
[email protected](posedge SEC_CLK) begin
if(send) begin
if(Pcounter == max_count) begin //COUNTING BLOCK SIZE
Pcounter <= 0;
IR_LED=1'b0;
end
else begin
if(flag)
IR_LED=1'b0; //GAP
else
IR_LED=1'b1;
Pcounter <= Pcounter+1;
end
end
end
很難說沒有看到您的代碼。請在問題中包含您的代碼。輸出波形(如ISim)的屏幕截圖也非常有用。 – duskwuff